A Software-Defined Radio (SDR) is a reconfigurable digital communications system using signal processing techniques on programmable digital architectures. With the emergence of new standards for complex communications and the growing computing power of general purpose processors, it is becoming interesting to exchange the energy efficiency of dedicated architectures for the flexibility and ease of implementation on general purpose processors. Even when the implementation of digital processing is finally done on a dedicated chip, a software version of this processing is necessary upstream to ensure the good properties of the functionality. This is usually achieved through simulation. However, simulations are often costly in terms of computing time. It is not uncommon to have to wait several days or even weeks to evaluate the performance of a system's functional model. In this context, this thesis proposes to study the most time-consuming algorithms in today's digital communication chains. These algorithms are most often present in error-correcting code decoders at the receiver level. The role of channel coding is to increase the robustness with respect to the errors that can appear when the information transits through a transmission channel. Three main families of error-correcting codes are studied in our work, namely LDPC codes, polar codes and turbo codes. These three families of codes are present in most current communication standards such as Wi-Fi, Ethernet, 3G, 4G and 5G mobile networks, digital television, etc. The resulting decoders offer the best compromise between error resistance and decoding speed. Each of these families is based on specific decoding algorithms. One of the main challenges of this thesis is to propose optimized software implementations for each of the three families. Specific answers are given and then more general optimization strategies are discussed. The idea is to abstract possible optimization strategies by studying a representative subset of decoders. Finally, the last part of this thesis proposes the implementation of a complete digital communication system using software defined radio. Based on the proposed fast implementations of decoders, a transmitter and a receiver compatible with the DVB-S2 standard are implemented. This standard is typically used for the broadcasting of multimedia content via satellite. On this occasion, a language dedicated to Software Defined Radio is developed to take advantage of the parallel architecture of today's general purpose processors. The system achieves sufficient data rates to be deployed in operational conditions. The different contributions of the thesis work have been made in a dynamic of openness, sharing and reusability. The result is an open source library named AFF3CT for A Fast Forward Error Correction Toolbox. Thus, all the results proposed in this thesis can be easily reproduced and extended. This philosophy is detailed in a specific chapter of the thesis manuscript.